A PCB prototype that spins once and works is the exception. A PCB that spins twice and works is a successful prototype project. The goal of IoT prototype PCB design is not perfection on the first revision — it is minimising the number of revisions required to reach a functionally correct board, and minimising the cost and time of each revision. These objectives shape every design decision from component selection to layout strategy.
This article covers the PCB design and fabrication process for IoT hardware prototypes — the choices that reduce first-spin failure modes, the layout decisions that matter most for IoT circuitry, and the bring-up process that identifies root causes of failures efficiently. The tooling focus is KiCad 7, which has become the de facto open-source standard for professional schematic and layout work.
Prototype vs Production Design Decisions
Prototype PCB design should deliberately prioritise debuggability over production optimisation. Add test points to every signal line you might need to probe — power rails, I2C and SPI lines, UART TX and RX, GPIO state lines. In production, test points add cost and board area; in prototyping, they are the difference between a 30-minute debug session and a 4-hour one. Be generous with test points on the prototype.
Prefer through-hole components for power circuitry, connectors, and any component you might need to replace during debugging. SMD resistors and capacitors are appropriate — they are standard 0402 or 0603 footprints that any competent assembler can place. QFN microcontrollers with no visible pins are appropriate if your assembler can handle them. BGAs are not appropriate on a prototype board that you may need to rework.
Avoid optimising board size prematurely on a prototype. A prototype that is 20% larger than the eventual production board is fine — the extra area allows more generous trace spacing, larger component footprints for reworkability, and space for the test points and debug connectors that make bring-up tractable. The size optimisation happens when the design is validated and production tooling begins.
Schematic Design
Schematic design should be readable independently from the layout. A schematic is documentation as much as it is a design tool — it should be legible to an engineer who did not create it, who needs to understand the circuit for debugging or modification. Organise the schematic by function: power supply circuitry on one sheet, microcontroller connections on another, sensor interfaces on a third. Power symbols (VCC, GND, 3V3, VBAT) should be labelled consistently and unambiguously.
Decoupling capacitors are one of the most common sources of prototype failures that require additional spins. Every IC power pin should have a 100 nF ceramic decoupling capacitor placed as close to the pin as possible in layout. Omitting decoupling capacitors on prototype schematics — "we can always add them later" — results in boards with power supply noise that causes intermittent failures and complicates debugging significantly.
Review the schematic against the component datasheet for every IC before PCB layout. Recommended application circuits in datasheets encode knowledge from the component manufacturer about what the circuit needs to work reliably. Deviating from the recommended circuit requires a specific reason. The most common prototype failure mode we encounter is a component wired correctly in isolation but missing the support components that the datasheet shows as required.
Common Schematic Errors
- Missing decoupling caps on IC power pins
- Pull-up resistors absent on I2C lines
- Incorrect boot mode pin states (floating vs pulled)
- UART TX connected to remote TX instead of remote RX
- Incorrect voltage levels on interface signals (3.3V device to 5V peripheral)
PCB Layout Fundamentals
Component placement should follow signal flow: arrange components so that related signals travel short distances, minimising trace length for high-frequency signals. Place decoupling capacitors first, immediately adjacent to the IC power pins they serve. Place the microcontroller and processor ICs centrally, with peripheral components grouped by function around them. The crystal oscillator should be as close to the microcontroller oscillator pins as possible — long traces on crystal lines cause clock issues that are difficult to diagnose.
Power planes reduce impedance and simplify routing on multi-layer boards. Even a two-layer prototype board should allocate most of one layer to ground plane — a solid, uninterrupted copper pour that provides low-impedance ground return paths and reduces EMI. Pour the ground plane last, after all components and traces are placed. Verify that the ground pour is connected to all ground pads — islands of copper not connected to the main ground plane act as antennas.
Trace width for power traces must be calculated based on the current they will carry. The IPC-2221A standard provides current capacity calculations based on trace width, thickness, and temperature rise. A 1 mm wide 1 oz copper trace can carry approximately 1 A with a 10°C temperature rise. For 3 A or more, trace width needs to be significantly wider or an alternative current path must be provided. Undersized power traces are a common cause of prototype failures that appear as intermittent reset or undervoltage events under load.
Fabrication and Assembly
PCB fabrication houses for prototype quantities — JLCPCB, PCBWay, OSH Park — offer 2-layer prototype boards with 5-day lead times at costs that make iterating cheap. Configure design rules in KiCad to match the fabrication house's capabilities: minimum trace width, minimum clearance, drill sizes, annular ring minimums. Running DRC (Design Rule Check) before submitting Gerbers prevents fabrication errors that waste the lead time.
PCBA (PCB Assembly) services at the same fabrication houses handle SMD component placement at costs that make hand-assembly uncompetitive for most IoT prototype quantities. Submit the BOM and centroid (component position) files alongside the Gerbers. Verify that all components in the BOM are available in the fabrication house's component library before submission — substitutions made by the assembler without consultation are a common source of first-spin failures.
Keep a small rework kit for prototype bring-up: hot air rework station, fine-tipped soldering iron, solder wick, flux, and quality tweezers. Most first-spin issues can be addressed with component substitution or bridged connections before ordering a new spin. A board that needs two 0402 resistors added to set a default state should be reworked, validated, and then corrected in the schematic before ordering a new revision.
Bring-Up and Debugging
Board bring-up follows a systematic sequence: power supply verification before connecting any sensitive components, voltage rail measurement before programming the microcontroller, programming and basic I/O test before connecting peripherals, and peripheral bring-up one at a time. Skipping steps — "the schematic is right, let's just load the full firmware" — converts multiple potential failure modes into a single confusing symptom that is harder to isolate.
Use a USB power meter or bench power supply with current limiting during initial power-on. A board with a short circuit will draw significantly more current than expected — a current-limited supply protects the board from damage. Measure the current at power-on before any other verification. Expected current draw at power-on for a simple IoT board is typically in the range of 50–200 mA depending on the components; anything dramatically higher indicates a problem.
Logic analysers and oscilloscopes are essential prototype debugging tools. A budget 8-channel logic analyser (Saleae Logic or compatible) captures I2C, SPI, UART, and GPIO state sequences that are invisible without it. A digital oscilloscope captures the timing and voltage quality of signals that the logic analyser represents only as digital levels. Together they reduce the time to diagnose communication failures from hours of guesswork to minutes of direct observation.
